The parallel form of the input sequence is decoded by means of a logical decoding circuit . 此并行形式序列通過邏輯解碼電路輸入。
An application of logic devices able to program to the decoding circuit 可編程邏輯器件在譯碼電路中的應(yīng)用
Colour decoding circuit 彩色解碼電路
The results of p & r demonstrate that this design constructs a rs encoding / decoding circuit with a 3 . 2k internal fifo cache embedded , at the scale of 46k gates . its encoding and decoding speed are 66mhz and 47mhz respectively 布局布線后結(jié)果表明本文所設(shè)計的rs編碼器的速度可達(dá)到66mhz ;解碼速度可達(dá)到47mhz ,電路規(guī)模為4 . 6萬門,包含有3 . 2k的內(nèi)部緩存fifo的rs編/解碼電路。
The hardware system includes power supply circuit , clock reset circuit , jtag model building circuit , decoding circuit , memory interface circuit , man - machine interface circuit and numeric control constant - current source interface circuit 硬件系統(tǒng)主要包括電源電路、時鐘復(fù)位電路、 jtag仿真接口電路,譯碼電路、存儲器接口電路、人機(jī)接口電路、 adc轉(zhuǎn)換電路和數(shù)控恒流源接口等。